
PCl
The peripheral component interconnect(PCI)is a recent high-bandwidth,processor-independent bus that can function as a mezzanine or peripheral bus.Compared with other common bus specifications,PCI delivers better system performance for high-speed I/O subsystems(e.g.,graphic display adapters,network interface controllers,disk controllers,and so on).The current standard allows the use of up to 64 data 1ines at 33 MHz,for a raw,tansfer rate of 264 MB/s,or 2.112 Gb/s.[3] But it is not just a high speed that makes PCI attractive.Economically,PCI is specifically designed to meet the I/O requirement of modern systems;it requires very few chips to implement and supports other buses attached to the PCI bus.


PCI is designed to support a variety of microprocessor-based configurations,including both single - and multiple -processor systems.Accordingly,it provides a general-purpose set of functions.It makes use of synchronous timing and a centralized arbitration scheme.
Fig. 1-21(a)shows a typical use of PCI in a single-processor system.A combined DRAM controller and bridge to the PCI bus provides tight coupling with the processor and the ability to deliver data at high speeds.[4] The bridge acts as a data buffer so that the speed of the PCI bus may differ from that of the processor’ s I/O capability.In a multiprocessor system(Fig. 1-21(b)),one or more PCI configurations may be connected by bridges to the processor’s system bus.The system bus supports only the processor / cache units,main memory,and the PCI bridges.Again,the use of bridges keeps the PCI independent of the processor speed yet provides the ability to receive and deliver data rapidly.[5]
4.总线设计举例
表1-3从分类学角度给出了4种通用总线类型:集中式和分散式控制及同步和异步通信。
PCI
外设部件互连(PCI)是一种近来使用的大带宽、独立于处理器的总线,可以作为底层或外围总线。与其他通用总线规范比较,PCI为高速I/O子系统(如图形显示适配器、网络接口控制器、磁盘控制器)提供更好的系统性能。现在的标准在33MHz主频时,可使用多达64条数据线,原数据传输速率可达264Mb/s,或2. 112Gb/s。PCI不仅因高传输速率而具有吸引力,它还是为满足低价位的现代系统而专门设计的;要求很少的芯片即可实现并支持与PCI总线连接的其他类型总线。
PCI支持各种基于微处理器的配置,包括单处理器系统和多处理器系统。相应地,它提供一套通用功能,并采用同步定时和集中仲裁机制。
图1-21(a)展示了PCI在单处理器系统中的典型应用。连向PCI总线的DRAM控制器和桥接器的组合与处理器紧密耦合,具有高速数据传输能力。桥接器的作用相当于数据缓冲器,用于解决PCI总线速度与处理器I/O能力不匹配的问题。在多处理器系统中(如图1-21(b)所示)可通过桥接器把1个或多个PCI配置与处理器系统总线相连。系统总线只支持处理器-高速缓存部件、主存储器和PCI桥接器。再者,桥接器的使用让 PCI与处理器速度无关,却带来了数据接收和发送的高速度。